Chapter 9 quiz

Check yourself: When Proofs Lie: Avoiding False Positives

Pick one answer per question, then press Check answers. Explanations appear after checking. Your best score is saved in this browser.

Q1 Why is a false positive more dangerous than a false negative? It takes longer to compute. It reports success while a bug may survive, and nothing forces you to investigate it. It crashes the tool. It only happens in simulation.

Q2 The design uses active-low rst_n and the properties use "disable iff (rst_n)". What happens? Assertions are checked only during normal operation. Assertions are checked only while the design is in reset, so normal operation is never checked. The tool reports a syntax error. Nothing changes.

Q3 Which is the best single defence against vacuous proofs? Longer proof depth Covers of the antecedents (and the tool vacuity check) More assumptions Faster engines

Q4 An assumption constrains an output of the design under test. Why is that a problem? It is a syntax error. It restricts the behaviour of the very logic being verified, and may hide bugs in it. Outputs cannot be referenced in SVA. It makes proofs slower.

Was this page helpful?

Tip: select any text on the page before clicking Report and it will be quoted in your report.