Chapter 12 quiz

Check yourself: Your Formal-Aware Workflow

Pick one answer per question, then press Check answers. Explanations appear after checking. Your best score is saved in this browser.

Q1 When is the cheapest time to write an assertion about a design assumption? During final signoff. When the designer writes the RTL that relies on it. After tape-out, in the lab. Only when a bug is found.

Q2 In the pulse stretcher solution, what does "in_pulse |=> out [*N]" check? out is high in the same cycle as the pulse. Starting one cycle after a pulse, out is high for N consecutive cycles. out toggles N times. out is high exactly N cycles later, once.

Q3 What is a good first step for a team new to formal? Full signoff of the most complex block. Design exploration with covers on new RTL, and formal apps such as connectivity. Replacing all simulation immediately. Buying more licences.

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